0hmX/am3352

src/index.tsx

import { Fragment } from 'react'
import { Am3352Presolved, am3352TracePaths, getAM3352TracePaths } from './saved-paths'
import { AM3352_SIGNAL_CONNECTIONS } from './layout'
import { AM3352_PINS } from './pin-map'
import { assertLayoutProfile, type LayoutProfile } from './profiles'

export { LAYOUT_PROFILES, type LayoutProfile } from './profiles'
export { am3352TracePaths, getAM3352TracePaths }
export { AM3352_POWER_PLANES } from './layout'
export { SUPPLY_DECOUPLING } from './decoupling-requirements'

const terminals = new Map<string, string>()
for (const connection of AM3352_SIGNAL_CONNECTIONS) {
  const pin = AM3352_PINS[connection.pinNumber - 1]!
  terminals.set(pin.ballName, pin.ballName)
  terminals.set(pin.name, pin.ballName)
}
export const AM3352_SIGNAL_TERMINALS = [...terminals.keys()]

export interface AM3352ModuleProps {
  name?: string
  layoutProfile?: LayoutProfile
  pcbX?: number
  pcbY?: number
  pcbRotation?: number
  /** External signal targets, addressed by BGA ball or signal name. */
  connections?: Partial<Record<string, string>>
}

/** Saved BGA fanout and fixed decoupling. No solver runs on import. */
export function AM3352Module({
  name = 'AM3352_SAVED', layoutProfile = 'native', connections = {},
  pcbX = 0, pcbY = 0, pcbRotation = 0,
}: AM3352ModuleProps = {}) {
  assertLayoutProfile(layoutProfile)
  if (!/^[A-Za-z_][A-Za-z0-9_]*$/.test(name)) throw new Error('Module name must be a selector-safe identifier')
  const usedBalls = new Set<string>()
  const external = Object.entries(connections).map(([terminal, target]) => {
    const ball = terminals.get(terminal)
    if (!ball) throw new Error(`Unknown AM3352 signal terminal '${terminal}'`)
    if (usedBalls.has(ball)) throw new Error(`AM3352 ball ${ball} is connected more than once through aliases`)
    usedBalls.add(ball)
    return { ball, target }
  })
  return <>
    <Am3352Presolved layoutProfile={layoutProfile} name={name} pcbX={pcbX} pcbY={pcbY} pcbRotation={pcbRotation}/>
    {external.map(({ball, target}) => target ? <Fragment key={ball}>
      <trace name={`${name}_${ball}_external`} from={`.${name} .U1 > .${ball}`} to={target}/>
    </Fragment> : null)}
  </>
}
export default AM3352Module

export type { AM3352Bounds } from './profiles'
export { getAM3352Bounds, getAM3352Layers, getAM3352PowerPlanes } from './profiles'
export { getAM3352Exits, transformAM3352Exit } from './exits'
export type { AM3352Exit, AM3352ExitPlacement, ExitSide, ExitVector } from './exits'
export { AM3352_DDR3_REQUIREMENTS, auditAM3352Ddr, ddrNetClass } from './ddr'
export { DdrMemoryAdapter, adaptDdrMemoryPaths, getDdrMemoryConnections, DDR_MEMORY_LAYER_MAP, DDR_MEMORY_SIX_LAYER_MAP, DDR_MEMORY_VIA } from './ddr-memory'
export type { DdrMemoryAdapterProps, DdrMemoryPin, DdrMemoryLayerMap, DdrMemoryBoundary } from './ddr-memory'

export { MT41K512M8_SUPPORT, getDdrMemorySupportConnections } from './ddr-memory-support'
export type { DdrMemorySupportTargets } from './ddr-memory-support'
export { DDR_BOARD_RULES, DDR_EVIDENCE_GATES, auditDdrBoard } from './ddr-board-rules'
export type { DdrBoardMeasurements, BoardRouteMeasurement, DdrEvidence, DdrEvidenceGate } from './ddr-board-rules'

export { DdrMemoryBoardProfile, getDdrMemoryBoardPaths, DDR_MEMORY_BOARD_PROFILE_BINDING, DDR_MEMORY_BOARD_PINS } from './ddr-memory-board-profile'
export type { DdrMemoryBoardProfileProps, DdrMemoryBoardProfileName } from './ddr-memory-board-profile'