0hmX/am3352

This code suite comprises TypeScript scripts that analyze, verify, and assemble complex DDR memory interface hardware, focusing on physical routing, via and pad placement, electrical clearance, and physical constraints, often involving precise geometric calculations and consistent provenance tracking.

Version
1.0.5
License
unset
Stars
0

tests/ddr-merged-signal-antipads.test.ts

import{test,expect}from'bun:test'
import{mergeDdrSignalAntipads}from'../scripts/merge-ddr-signal-antipads'
const plane={type:'pcb_copper_pour',pcb_copper_pour_id:'p',layer:'inner1',source_net_id:'g',brep_shape:{outer_ring:{vertices:[{x:-5,y:-5},{x:5,y:-5},{x:5,y:5},{x:-5,y:5}]},inner_rings:[]}}
test('overlapping signal voids merge while preserving a single copper component',()=>{const p=mergeDdrSignalAntipads([plane],[{x:0,y:0},{x:.6,y:0}]);expect(p.planes[0].brep_shape.inner_rings).toHaveLength(1);expect(p.changes[0].outerComponents).toBe(1);expect(p.changes[0].minimumWebMm).toBeGreaterThan(.1524);expect(plane.brep_shape.inner_rings).toHaveLength(0)})
test('distinct signal voids with a thin remaining web are rejected',()=>{expect(()=>mergeDdrSignalAntipads([plane],[{x:0,y:0},{x:.75,y:0}])).toThrow('web')})