0hmX/am62l-lpddr4-clean

This code defines the hardware connections and routing logic for a DDR memory interface, specifying physical signal mappings between the system-on-chip (SoC) and DDR memory components, including connections for data, address, clock, reset, and power/ground balls.

Version
1.0.0
License
unset
Stars
0

package.json

{
  "name": "@tsci/0hmX.am62l-lpddr4-clean",
  "version": "1.0.0",
  "private": true,
  "description": "Clean AM62L32 to MT53E1G16D1ZW LPDDR4 connectivity example",
  "scripts": {
    "dev": "tsci dev",
    "build": "tsci build index.circuit.tsx",
    "check:netlist": "tsci check netlist index.circuit.tsx",
    "check:placement": "tsci check placement index.circuit.tsx",
    "check:shorts": "tsci check shorts index.circuit.tsx",
    "typecheck": "tsc --noEmit"
  },
  "devDependencies": {
    "@tsci/0hmX.mt53e1g16d1zw-footprint": "1.0.2",
    "@tsci/tscircuit.ti": "1.0.100",
    "@tscircuit/core": "0.0.1813",
    "@tscircuit/props": "0.0.644",
    "@types/react": "^19.1.0",
    "circuit-json": "0.0.479",
    "tscircuit": "0.0.2461",
    "typescript": "^5.9.0"
  },
  "overrides": {
    "@tscircuit/core": "0.0.1813"
  }
}