ShiboSoftwareDev/am625sip-linux-board

subcircuits/usb-c-device.tsx

import { Fragment } from "react"
import { TYPE_C_31_M_12 } from "../imports/TYPE_C_31_M_12"

const SIGNAL_LAYERS = ["top", "inner1", "inner2", "bottom"] as const

const BoundaryPad = ({
  name,
  pcbY,
  plated = false,
}: {
  name: string
  pcbY: number
  plated?: boolean
}) => (
  <chip
    name={name}
    pcbX={-8}
    pcbY={pcbY}
    noSchematicRepresentation
    footprint={
      <footprint>
        {plated ? (
          <platedhole
            portHints={["pin1"]}
            shape="circle"
            holeDiameter="0.3mm"
            outerDiameter="0.8mm"
          />
        ) : (
          <smtpad
            portHints={["pin1"]}
            shape="rect"
            width="0.3mm"
            height="0.3mm"
          />
        )}
      </footprint>
    }
  />
)

export const UsbCDeviceSubcircuit = () => (
  <subcircuit
    name="USB_C_DEVICE"
    autorouter="default"
    exposedNets={["GND"]}
    defaultTraceWidth="0.08128mm"
    minTraceWidth="0.08128mm"
    minTraceToPadEdgeClearance="0.05mm"
    minPadEdgeToPadEdgeClearance="0.08128mm"
    minViaEdgeToPadEdgeClearance="0.08128mm"
    minViaHoleEdgeToViaHoleEdgeClearance="0.1016mm"
    minViaHoleDiameter="0.1mm"
    minViaPadDiameter="0.24mm"
  >
    <autoroutingphase
      name="USB_C_FLIP_TIES"
      phaseIndex={0}
      autorouter="default"
    />
    <autoroutingphase
      name="USB_C_DATA_ENTRY"
      phaseIndex={0.1}
      autorouter="default"
    />
    <autoroutingphase name="USB_C_CC" phaseIndex={1} autorouter="default" />
    <autoroutingphase
      name="USB_C_VBUS_ROUTE"
      phaseIndex={2}
      autorouter="default"
    />
    <autoroutingphase
      name="USB_C_GROUND_DROPS"
      phaseIndex={3}
      autorouter="fanout"
      fanoutRoutingLayers={[...SIGNAL_LAYERS]}
      fanoutPourNetMap={{ inner1: ["GND"] }}
    />

    <net name="GND" routingPhaseIndex={3} />

    <TYPE_C_31_M_12 name="J5" pcbX={2} pcbY={0} pcbRotation={90} />
    <resistor
      name="R24"
      resistance="5.1k"
      footprint="0402"
      supplierPartNumbers={{ jlcpcb: ["C25905"] }}
      pcbX={-3}
      pcbY={3.1}
      pcbRotation={90}
    />
    <resistor
      name="R25"
      resistance="5.1k"
      footprint="0402"
      supplierPartNumbers={{ jlcpcb: ["C25905"] }}
      pcbX={-3}
      pcbY={-3.1}
      pcbRotation={90}
    />

    <BoundaryPad name="X_DP" pcbY={0.75} />
    <BoundaryPad name="X_DM" pcbY={-0.75} />
    <BoundaryPad name="X_VBUS" pcbY={3.5} plated />
    <BoundaryPad name="X_GND" pcbY={-4.5} plated />

    <bus
      name="USB_C_DP_FLIP_TIE_BUS"
      connections={["USB_C_DP_FLIP_TIE"]}
      routingPhaseIndex={0}
      preferredLayer="bottom"
      pcbAllowedLayers={["bottom"]}
    />
    <bus
      name="USB_C_DM_FLIP_TIE_BUS"
      connections={["USB_C_DM_FLIP_TIE"]}
      routingPhaseIndex={0}
      preferredLayer="inner1"
      pcbAllowedLayers={["inner1"]}
    />
    <trace
      name="USB_C_DP_FLIP_TIE"
      from=".J5 > .A6"
      to=".J5 > .B6"
      width="0.15mm"
      routingPhaseIndex={0}
    />
    <trace
      name="USB_C_DM_FLIP_TIE"
      from=".J5 > .A7"
      to=".J5 > .B7"
      width="0.15mm"
      routingPhaseIndex={0}
    />
    <trace
      name="USB_C_DP_ENTRY"
      from=".X_DP > .pin1"
      to=".J5 > .B6"
      width="0.15mm"
      routingPhaseIndex={0.1}
    />
    <trace
      name="USB_C_DM_ENTRY"
      from=".X_DM > .pin1"
      to=".J5 > .B7"
      width="0.15mm"
      routingPhaseIndex={0.1}
    />
    <bus
      name="USB_C_DATA_PAIR"
      connections={["USB_C_DP_ENTRY", "USB_C_DM_ENTRY"]}
      routingPhaseIndex={0.1}
      maxLengthSkew="0.2mm"
      targetImpedance="45ohm"
      pcbTraceWidth="0.15mm"
      preferredLayers={["inner2"]}
    />

    <trace
      name="USB_C_CC1"
      from=".J5 > .A5"
      to=".R24 > .pin1"
      routingPhaseIndex={1}
    />
    <trace
      name="USB_C_CC2"
      from=".J5 > .B5"
      to=".R25 > .pin1"
      routingPhaseIndex={1}
    />
    <trace
      name="USB_C_VBUS"
      path={[".X_VBUS > .pin1", ".J5 > .A4B9", ".J5 > .B4A9"]}
      width="0.3mm"
      routingPhaseIndex={2}
    />

    {[
      ".X_GND > .pin1",
      ".R24 > .pin2",
      ".R25 > .pin2",
      ".J5 > .A1B12",
      ".J5 > .B1A12",
      ".J5 > .EH1",
      ".J5 > .EH2",
      ".J5 > .EH3",
      ".J5 > .EH4",
    ].map((from, index) => (
      <Fragment key={from}>
        <trace
          name={`USB_C_GROUND_${index}`}
          from={from}
          to="net.GND"
          width="0.3mm"
          routingPhaseIndex={3}
        />
      </Fragment>
    ))}
  </subcircuit>
)